blib/lib/Verilog/Netlist/Port.pm | |||
---|---|---|---|
Criterion | Covered | Total | % |
condition | 4 | 12 | 33.3 |
line | !l | l&&!r | l&&r | condition |
---|---|---|---|---|
86 | 0 | 88 | 0 | $net and $net->port |
88 | 0 | 0 | $net and $net->port and $net->port != $self |
line | l | !l | condition |
---|---|---|---|
62 | 0 | 0 | $self->data_type || $self->net && $self->net->type || '' |
106 | 110 | 0 | shift() || 0 |
107 | 0 | 110 | $self->array || '' |