Coverage Summary

Module Verilog-VCD-Writer
Version 0.004
Database: /root/.cpan/build/Verilog-VCD-Writer-0.004-0/cover_db
Report date: 2018-04-22 15:49:08
Perl version: v5.26.1
OS: linux
Thresholds: < 75% < 90% < 100% = 100%

Restrict to regex:

file stmt bran cond sub pod time total
Total 100.0 85.7 66.6 100.0 75.0 100.0 96.6
blib/lib/Verilog/VCD/Writer.pm 100.0 75.0 n/a 100.0 100.0 24.2 97.6
blib/lib/Verilog/VCD/Writer/Module.pm 100.0 n/a n/a 100.0 75.0 12.9 98.1
blib/lib/Verilog/VCD/Writer/Signal.pm 100.0 100.0 66.6 100.0 0.0 12.0 94.3
blib/lib/Verilog/VCD/Writer/Symbol.pm 100.0 n/a n/a 100.0 0.0 50.7 93.3