blib/lib/Verilog/VCD/Writer/Module.pm | |||
---|---|---|---|
Criterion | Covered | Total | % |
statement | 39 | 39 | 100.0 |
branch | n/a | ||
condition | n/a | ||
subroutine | 11 | 11 | 100.0 |
pod | 3 | 4 | 75.0 |
total | 53 | 54 | 98.1 |
line | stmt | bran | cond | sub | pod | time | code |
---|---|---|---|---|---|---|---|
1 | |||||||
2 | |||||||
3 | 3 | 3 | 106202 | perltidy |
|||
3 | 16 | ||||||
3 | 86 | ||||||
4 | 3 | 3 | 15 | |
|||
3 | 7 | ||||||
3 | 76 |