Branch Coverage

blib/lib/Verilog/VCD.pm
Criterion Covered Total %
branch 50 54 92.5


line true false branch
21 2 4 unless (defined $file)
40 2 24 unless (defined $file)
45 20 4 if ($opt)
46 3 17 unless (ref $opt eq 'HASH')
52 4 17 exists $$opt{'only_sigs'} ? :
56 3 18 if (exists $$opt{'siglist'}) { }
58 0 3 unless (%usigs)
67 6 15 exists $$opt{'use_stdout'} ? :
74 2 19 unless open my $fh, '<', $file
79 16 837 if (/ \$enddefinitions \b /x) { }
17 820 elsif (/ \$timescale \b /x) { }
77 743 elsif (/ \$scope \b /x) { }
77 666 elsif (/ \$upscope \b /x) { }
76 590 elsif (/ \$var \b /x) { }
97 493 elsif (/ ^ [#] (\d+) /x) { }
124 369 elsif (/ ^ ([01zx]) (.+) /xi or / ^ [br] (\S+) \s+ (.+) /xi) { }
81 1 15 unless ($num_sigs)
82 0 1 if ($all_sigs) { }
91 2 13 if ($num_sigs > 1 and $use_stdout)
95 2 11 if $only_sigs
127 46 30 if exists $usigs{$full_name} or $all_sigs
143 88 36 if (exists $data{$code})
144 20 68 if ($use_stdout) { }
174 8 9 if (exists $$opt{'timescale'}) { }
186 8 0 if ($tscale =~ / (\d+) ([a-z]+) /xi) { }
206 8 0 if (exists $mults{$units}) { }
215 7 1 if (exists $mults{$new_units}) { }