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# Verilog - Verilog Perl Interface |
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# See copyright, etc in below POD section. |
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###################################################################### |
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package Verilog::Netlist::ContAssign; |
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use Verilog::Netlist; |
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use Verilog::Netlist::Subclass; |
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use vars qw($VERSION @ISA); |
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use strict; |
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2735
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@ISA = qw(Verilog::Netlist::ContAssign::Struct |
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Verilog::Netlist::Subclass); |
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$VERSION = '3.478'; |
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structs('new', |
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'Verilog::Netlist::ContAssign::Struct' |
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=>[name => '$', #' # Unique ID |
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keyword => '$', #' # Keyword name |
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filename => '$', #' # Filename this came from |
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lineno => '$', #' # Linenumber this came from |
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userdata => '%', # User information |
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attributes => '%', #' # Misc attributes for systemperl or other processors |
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# |
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lhs => '$', #' # Left hand side of assignment |
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rhs => '$', #' # Right hand side of assignment |
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module => '$', #' # Module reference |
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]); |
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sub delete { |
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my $self = shift; |
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my $h = $self->module->_statements; |
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delete $h->{$self->name}; |
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return undef; |
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} |
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###################################################################### |
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#### Methods |
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sub logger { |
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my $self = shift; |
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return $self->netlist->logger; |
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} |
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sub netlist { |
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my $self = shift; |
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return $self->module->netlist; |
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} |
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sub lint {} |
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sub link {} |
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sub verilog_text { |
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my $self = shift; |
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my @out = ($self->keyword," ",$self->lhs," = ",$self->rhs,";"); |
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return (wantarray ? @out : join('',@out)); |
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} |
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sub dump { |
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my $self = shift; |
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my $indent = shift||0; |
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print " "x$indent,"ContAssign:",$self->keyword," lhs:",$self->lhs," rhs:",$self->rhs; |
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print "\n"; |
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} |
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###################################################################### |
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#### Package return |
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1; |
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__END__ |