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# You may distribute under the terms of either the GNU General Public License |
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# or the Artistic License (the same terms as Perl itself) |
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# |
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# (C) Paul Evans, 2015-2021 -- leonerd@leonerd.org.uk |
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833
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use v5.26; |
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use Object::Pad 0.57; |
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package Device::Chip::MCP23x17 0.05; |
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class Device::Chip::MCP23x17 |
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:isa(Device::Chip); |
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use Future::AsyncAwait; |
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=head1 NAME |
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C - chip driver for the F family |
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=head1 SYNOPSIS |
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use Device::Chip::MCP23S17; |
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use Future::AsyncAwait; |
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use constant { HIGH => 0xFFFF, LOW => 0 }; |
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my $chip = Device::Chip::MCP23S17->new; |
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await $chip->mount( Device::Chip::Adapter::...->new ); |
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foreach my $bit ( 0 .. 15 ) { |
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await $chip->write_gpio( HIGH, 1 << $bit ); |
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sleep 1; |
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await $chip->write_gpio( LOW, 1 << $bit ); |
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} |
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=head1 DESCRIPTION |
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This L subclass provides specific communication to the |
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F F family of chips. |
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This module itself is an abstract base; to talk to a specific chip see |
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one of the following subclasses: |
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=over 4 |
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F over SPI - see L |
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=back |
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Aside from the method of communication with the actual chip hardware, these |
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modules all provide the same higher-level API to the containing application. |
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This module currently only supports a chip running in the C |
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configuration. |
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=cut |
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ADJUST |
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{ |
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$self->reset; |
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} |
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=head1 MOUNT PARAMETERS |
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=head2 reset |
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66
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The name of the GPIO line on the adapter that is connected to the C |
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pin of the chip, if there is one. This will be used by the L method. |
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=cut |
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71
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has $_resetpin; |
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5
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11
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async method mount ( $adapter, %params ) |
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74
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{ |
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$_resetpin = delete $params{reset}; |
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return await $self->SUPER::mount( $adapter, %params ); |
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5
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1
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550
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} |
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80
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use constant { |
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# Register allocations when in IOCON.BANK=0 mode |
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# TODO: we don't yet support BANK=1 mode |
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6
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7858
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REG_IODIR => 0x00, |
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REG_IPOL => 0x02, |
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REG_GPINTEN => 0x04, |
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REG_DEFVAL => 0x06, |
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REG_INTCON => 0x08, |
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REG_IOCON => 0x0A, |
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REG_GPPU => 0x0C, |
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REG_INTF => 0x0E, |
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REG_INTCAP => 0x10, |
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REG_GPIO => 0x12, |
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REG_OLAT => 0x14, |
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1602
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}; |
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has %_regcache; |
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async method _cached_maskedwrite_u16 ( $name, $val, $mask ) |
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{ |
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my $want = ( $_regcache{$name} & ~$mask ) | ( $val & $mask ); |
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return if ( my $got = $_regcache{$name} ) == $want; |
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$_regcache{$name} = $want; |
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my $reg = __PACKAGE__->can( "REG_\U$name" )->(); |
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if( ( $got & 0xFF00 ) == ( $want & 0xFF00 ) ) { |
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# low-byte write |
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await $self->write_reg( $reg, pack "C", $want & 0x00FF ); |
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} |
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elsif( ( $got & 0x00FF ) == ( $want & 0x00FF ) ) { |
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2
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await $self->write_reg( $reg+1, pack "C", ( $want & 0xFF00 ) >> 8 ); |
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} |
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else { |
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0
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await $self->write_reg( $reg, pack "S<", $want ); |
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} |
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10004
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} |
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=head1 METHODS |
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121
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The following methods documented in an C expression return L |
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instances. |
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Each method that takes a C<$mask> parameter uses it to select which IO pins |
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are affected. The mask is a 16-bit integer; selecting only those pins for |
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which bits are set. The lower 8 bits relate to the C pins, the higher 8 |
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to the C pins. Pins that are not selected by the mask remain unaffected. |
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129
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=cut |
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=head2 reset |
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133
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await $chip->reset; |
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135
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Resets the cached register values back to their power-up defaults. |
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137
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Additionally, if the C mount parameter is defined, pulses the C |
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pin of the chip. |
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140
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=cut |
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142
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async method reset |
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{ |
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# Default registers |
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15
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$_regcache{iodir} = 0xffff; |
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$_regcache{olat} = 0x0000; |
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11
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$_regcache{ipol} = 0x0000; |
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11
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$_regcache{gppu} = 0x0000; |
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150
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5
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91
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if( defined( my $reset = $_resetpin ) ) { |
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0
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0
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await $self->protocol->write_gpios( { $reset => 0 } ); |
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0
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0
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await $self->protocol->write_gpios( { $reset => 1 } ); |
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} |
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1
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} |
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156
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=head2 write_gpio |
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158
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await $chip->write_gpio( $val, $mask ); |
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160
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Sets the pins named in the C<$mask> to be outputs, and sets their values from |
161
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the bits in C<$val>. Both values are 16-bit integers. |
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163
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=cut |
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165
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11
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async method write_gpio ( $val, $mask ) |
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{ |
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# Write the values before the direction, so as not to cause glitches |
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await $self->_cached_maskedwrite_u16( olat => $val, $mask ), |
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await $self->_cached_maskedwrite_u16( iodir => 0x0000, $mask ), |
170
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} |
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172
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=head2 read_gpio |
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174
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$val = await $chip->read_gpio( $mask ); |
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176
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Sets the pins named in the C<$mask> to be inputs, and reads the current pin |
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values of them. The mask and the return value are 16-bit integers. |
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179
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=cut |
180
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181
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2
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2
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async method read_gpio ( $mask ) |
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{ |
183
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2
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await $self->tris_gpio( $mask ); |
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185
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2
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1279
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my $val = unpack "S<", await $self->read_reg( REG_GPIO, 2 ); |
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2
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111
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return $val & $mask; |
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2
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1
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} |
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189
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=head2 tris_gpio |
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191
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await $chip->tris_gpio( $mask ); |
192
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193
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Sets the pins named in the C<$mask> to be inputs ("tristate"). The mask is a |
194
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16-bit integer. |
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196
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=cut |
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198
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3
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4
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async method tris_gpio ( $mask ) |
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3
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5
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199
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{ |
200
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3
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10
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await $self->_cached_maskedwrite_u16( iodir => 0xFFFF, $mask ); |
201
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3
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3
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1
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1269
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} |
202
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203
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=head2 set_input_polarity |
204
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205
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await $chip->set_input_polarity( $pol, $mask ); |
206
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207
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Sets the input polarity of the pins given by C<$mask> to be the values given |
208
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in C<$pol>. Pins associated with bits set in C<$pol> will read with an |
209
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inverted sense. Both values are 16-bit integers. |
210
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211
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=cut |
212
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213
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1
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2
|
async method set_input_polarity ( $pol, $mask ) |
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1
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2
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1
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2
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1
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1
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214
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1
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3
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{ |
215
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1
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6
|
await $self->_cached_maskedwrite_u16( ipol => $pol, $mask ); |
216
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1
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1
|
1
|
277
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} |
217
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218
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=head2 set_input_pullup |
219
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220
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|
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await $chip->set_input_pullup( $pullup, $mask ); |
221
|
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222
|
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|
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Enables or disables the input pullup resistors on the pins given by C<$mask> |
223
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|
|
as per the values given by C<$pullup>. Both values are 16-bit integers. |
224
|
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|
225
|
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=cut |
226
|
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|
227
|
1
|
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2
|
async method set_input_pullup ( $pullup, $mask ) |
|
1
|
|
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|
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2
|
|
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1
|
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2
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1
|
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1
|
|
228
|
1
|
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|
|
3
|
{ |
229
|
1
|
|
|
|
|
3
|
await $self->_cached_maskedwrite_u16( gppu => $pullup, $mask ); |
230
|
1
|
|
|
1
|
1
|
10653
|
} |
231
|
|
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|
|
|
|
|
232
|
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|
|
=head2 as_adapter |
233
|
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|
|
|
234
|
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|
|
$adapter = $chip->as_adapter; |
235
|
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|
|
236
|
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|
|
Returns an instance implementing the L interface, |
237
|
|
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|
|
|
allowing access to the GPIO pins via the standard adapter API. See also |
238
|
|
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|
L. |
239
|
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|
|
|
240
|
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|
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|
=cut |
241
|
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|
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|
|
242
|
|
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|
|
method as_adapter |
243
|
1
|
|
|
1
|
1
|
217
|
{ |
244
|
1
|
|
|
|
|
382
|
require Device::Chip::MCP23x17::Adapter; |
245
|
1
|
|
|
|
|
9
|
return Device::Chip::MCP23x17::Adapter->new( chip => $self ); |
246
|
|
|
|
|
|
|
} |
247
|
|
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|
|
248
|
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|
|
=head1 TODO |
249
|
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|
|
|
250
|
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|
|
=over 4 |
251
|
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|
252
|
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|
|
=item * |
253
|
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|
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|
|
|
254
|
|
|
|
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|
|
Wrap the interrupt-related registers - C, C, C, |
255
|
|
|
|
|
|
|
C, C. Support the interrupt-related bits in C - |
256
|
|
|
|
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|
|
C, C, C. |
257
|
|
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|
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|
258
|
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|
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|
|
=item * |
259
|
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|
|
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|
|
260
|
|
|
|
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|
|
Support the general configuration bits in the C register - C, |
261
|
|
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|
C. |
262
|
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|
|
263
|
|
|
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|
|
=item * |
264
|
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|
265
|
|
|
|
|
|
|
Consider how easy/hard or indeed how useful it might be to support |
266
|
|
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|
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|
|
C configuration. |
267
|
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|
|
|
268
|
|
|
|
|
|
|
=back |
269
|
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|
|
270
|
|
|
|
|
|
|
=head1 AUTHOR |
271
|
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|
272
|
|
|
|
|
|
|
Paul Evans |
273
|
|
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|
274
|
|
|
|
|
|
|
=cut |
275
|
|
|
|
|
|
|
|
276
|
|
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|
|
|
|
0x55AA; |